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Introduction to Logic Synthesis Using Verilog HDL (Synthesis Lectures on Digital Circuits and Systems, 6)
- Paperback
- Publisher:
- Morgan and Claypool Publishers
- Release Date:
- 2006
- ISBN-10:
- 1598291068
- ISBN-13:
- 9781598291063
- List Price:
- $35.00
Cheapest Price Summary |
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| Store | Condition | Coupons & Deals | Price | Shipping | Total | |
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Abebooks (Marketplace) Used
|
Used |
$23.27 as of 3 seconds ago |
FREE |
34% off
$23.27Buy Nowclick here!
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Store Condition Coupons & Deals Price Shipping Total Abebooks
(Marketplace)UsedUsed $23.27
as of 3 seconds agoFREE 34% off $23.27Buy Nowclick here!Amazon
(Marketplace)UsedUsed Amazon coupon(s)
Details: Get FREE Shipping with a $25+ purchase
Restrictions: Spend over $25, see Amazon for details.
Coupon Code: no code needed
$23.46
as of 3 seconds ago$3.99 33% off $27.45Buy Nowclick here! -
Store Condition Coupons & Deals Price Shipping Total Abebooks
(Marketplace)UsedUsed $23.27
as of 3 seconds agoFREE 34% off $23.27Buy Nowclick here!Amazon
(Marketplace)UsedUsed Amazon coupon(s)
Details: Get FREE Shipping with a $25+ purchase
Restrictions: Spend over $25, see Amazon for details.
Coupon Code: no code needed
$23.46
as of 3 seconds ago$3.99 33% off $27.45Buy Nowclick here!
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