| | ||
| | | |
| |||
| |
|
| |
![]() | ![]() |
|
| | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
![]() Accounting & Finance Architecture Arts & Photography Business & Investing Business Management Computer Science Apple Education Business & Culture Certification Central Databases Digital Music Digital Photography & Video Games & Strategy Guides Graphic Design Hardware Home Computing Microsoft Mobile & Wireless Computing Networking Operating Systems Programming Project Management Security & Encryption Software Web Development Engineering History Humanities Law Medicine Professional Science Reference Science Social Sciences Summaries and Customer Reviews are supplied by Amazon.com
Customer Reviews:Average Customer Rating: Good for starters, for the most part I've used this book for four weeks now and it does a good job with the basics but it often say don't mind this part we'll explain it later. The index isn't very good when you just want to know where in the book something is. With that said, good beginners school book, but OK reference book. Not a good reference book As a first book on Verilog this is not a good book. I could not find any thing I was looking for in the index. There is only about a quarter of a page on memories and only a four line example. Most of the examples were poor and incomplete. This book is not for beginners. I found about four other books that were good references, such as A Verilog HDL Primer, Third Edition by J. Bhasker and Verilog HDL: Digital Design and Modeling by Joseph Cavanagh. Both books have good examples and explanations. If your just starting out buy these two books and not Verilog HDL by Samir Palnitkar. Surely there must be a better verilog book out there Here are my complaints with the book: Awful reference source I used this book to learn Verilog and if you read it from beginning to end, you might learn the gist of the language...but that's it. The book is virtually useless as any kind of reference source. The index is almost unusable (if you want to learn about the keywords "fork" or "join", for example, good luck. They aren't even listed in the index, along with just about everything else). Descriptions of how the language works are cryptic and overly brief, though the examples are sometimes helpful. Great coverage of Verilog language Very comprehensive text about the Verilog language, covering the various aspects of the language. The text is clear and well organized. The exercises at the end of the chapter helped me a lot in the learning process. The simulator included is very simnple and all examples in the book run flawlessly. A few things I did not like: the few mistakes in the text and code could have been easily caught by any careful reviewer, the lack of a more detailed example to show the usage of the various constructs in a real world Verilog design and hints about how to build synthesizable Verilog programs. I have enjoyed the author's style and recommend the book for any person who wants to learn Verilog, including other software engineers like myself who want to understand some HDL basics. | | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| ![]() | |
| |